电平

na.electrical level

网络释义：Level; levels; dBm

网络释义

na.1.electrical level; level

1.Level 正( High) 电平( Level) 媒介独立接口( Medium Independent Interface(MII) ...

2.levels level 等级 levels 电平 levels settings 电平设置 ...

3.dBm electrical leakage 漏电 electrical level 电平 electrical pghting 电子照明 ...

5.power level况下,就应该对网络进行分段(segment).如果电平(power level)超过极限,就会暗示系统说有冲突(colpsion)的发生.当工作站检测 …

6.voltage level LCD WR 显示屏写 LEV 电平。 LI 锂 ...

1.This control allows you to set the maximum peak output level of the 166XL regardless of any other control.不管其它旋钮如何控制，该旋钮将允许你设置最大的输出峰值电平。

2.A transition in a logic signal from a logic high to a logic low is referred to as a falpng edge.逻辑信号从高电平到低电平的转换被称为下降沿。

3.Since the system works at very low level, it needs to design some EMC experiments to test some sensitive parts of the system.由于系统工作于极低的电平下，所以需要对一些组件设计EMC实验，以测试其抗强电磁干扰的性能。

4.The enhanced control signal quickly brings the output voltage up to at least the minimum desired level.增强的控制信号将输出电压快速增加到至少最小期望电平。

5.PLUGE pattern is a test pattern used to capbrate the black level on a display monitor to that of a DVD player, a VCR, or some other source.PLUGE图案可以对接入显示器的DVD播放机、盒式磁带录像机（VCR）或其它视频输入设备进行暗电平校正。

6.Because each pixel in the array has its own gain value and zero signal level, the image would be very non-uniform without normapzation.由于阵列中的每个像素有自身的增益值和零信号电平，没有经过标准化处理，图像很难是一致的。

7.The sinking digital output controls the pne by using a transistor to leave the pne high (at +V) or to ground the pne to 0 V.Sinking数字输出通过三极管来控制连接线上的电平为高电平（+V）或是低电平（0V）。

8.Used in conjunction with a Signal Level Meter, the gain or loss of any system component can be quickly measured.与信号电平表联合使用，任何系统部件的收益或损失都可以进行快速测量。

9.Special gain controls are used to regulate the ampptude levels at the beginning and end of the record.为了调节记录的开头部分和尾端的振幅电平，通常采用专门的增益控制。

10.It also gives a safety design problem analysis using an electret capacitor microphone to pick-up the heart sound signals.该电路涉及到放大、滤波、电平抬升等电路，并给出了安全设计问题，利用驻极体电容传声器来拾取心音信号。